The electronics industry has seen a trend toward applications running at increasingly lower supply voltages while input current requirements often remain high. This has been especially true in battery powered applications which can run from a supply as low as a single volt, while peak current requirements can be as high as an amp. This trend has been pushed by the electronics industry increasing use of finer and finer geometry CMOS processes. The trend of lower supply voltages has made it difficult for power circuits to drive these applications. Due to factors such as expense and high metal impedance, power and analog ICs tend to lag current state of the art CMOS processes by several generations. Thus, the threshold voltage of MOS devices used in power and analog ICs can be on the order of the supply voltage they are running from or output voltage they are trying to provide. This makes it very difficult to provide high current output functions.
The low threshold voltage (VT) of a native NMOS transistor may be very useful as a source follower or open drain output device because the transistor provides a lower channel resistance than that of a non-native NMOS transistor given the same gate drive. However, native NMOS transistors are generally not used as output devices because an open drain output can leak significantly with a zero gate-source voltage and a source follower output voltage can be positive with a zero gate voltage (i.e., an output voltage may exist when it is supposed to be shutdown).
For low input supplies on the order of the threshold voltage VT of PMOS transistors, it is sometimes impractical to provide a low enough source-drain impedance necessary for high output current applications. The VT of a PMOS transistor can be reduced by changing the doping of the PMOS channel to provide lower source-drain impedance. Adjusting the PMOS channel doping is usually undesirable or impractical though.
The need thus exists for a method that provides adequate means to ensure turn-off low voltage threshold NMOS transistors as well as a method for providing enhanced PMOS transistor drive, particularly if the device supply is of low voltage.